Implementation of AES Algorithm on FPGA

Smékal, D.

Implementation of AES Algorithm on FPGA

Files

eeict2015-193-smekal.pdf(562.92 KB)

Date

2015

Authors

Smékal, D.

Publisher

Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií

Abstract

This paper presents a VHDL (Very High Speed Integrated Circuit Hardware Description Language) implementation of 128-bit AES (Advanced Encryption Standard) on FPGA card (FieldProgrammable Gate Array) using Virtex-7 FPGA chip manufactured by Xilinx company. In this project our main concern is to implement all modules of this algorithm on hardware.

Keywords

Cryptography, FPGA, AES, VHDL

Citation

Proceedings of the 21st Conference STUDENT EEICT 2015. s. 193-195. ISBN 978-80-214-5148-3
http://www.feec.vutbr.cz/EEICT/

Document type

Peer-reviewed

Document version

Published version

Language of document

cs

Document licence