Blind Oversampling Data Recovery with Low Hardware Complexity

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Date
2010-04
ORCID
Advisor
Referee
Mark
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Volume Title
Publisher
Společnost pro radioelektronické inženýrství
Abstract
The paper is focused on the optimization and implementation of fully digital feed-forward blind oversampling CDR (BO-CDR). Two new phase-decision algorithms are proposed. Their complexity is very low, enabling a very simple and fast implementation even in FPGA, which was used as a development platform as well as a target device for the BO-CDR block. The FPGA-based optimization gave the opportunity to perform on-the-fly optimization under real conditions of target link. This greatly shortened the development time as there were no errors caused by inaccurate simulation models. Measurement results obtained on real links are included showing the jitter tolerance of the proposed algorithms to be comparable to the performance of modern PLL-based CDRs.
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Citation
Radioengineering. 2010, vol. 19, č. 1, s. 74-78. ISSN 1210-2512
http://www.radioeng.cz/fulltexts/2010/10_01_074_078.pdf
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Peer-reviewed
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Published version
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Language of document
en
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Defence
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Creative Commons Attribution 3.0 Unported License
http://creativecommons.org/licenses/by/3.0/
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