Fractional-Order Oscillator Design Using Unity-Gain Voltage Buffers and OTAs

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dc.contributor.authorKartci, Aslihancs
dc.contributor.authorHerencsár, Norbertcs
dc.contributor.authorKoton, Jaroslavcs
dc.contributor.authorBrančík, Lubomírcs
dc.contributor.authorVrba, Kamilcs
dc.contributor.authorTsirimokou, Georgiacs
dc.contributor.authorPsychalinos, Costascs
dc.date.accessioned2019-04-03T03:54:45Z
dc.date.available2019-04-03T03:54:45Z
dc.date.issued2017-08-06cs
dc.description.abstractIn this study, a new voltage-mode fractional-order oscillator using two unity-gain voltage buffers, two operational transconductance amplifiers, one resistor, and two capacitors is presented. The design procedure of integer-order as well as fractional-order oscillator employing in total 20 MOS transistors is discussed. Effects of fractional-order capacitors on amplitude, phase, condition of oscillation, and frequency of oscillation are shown. Various case examples are given while SPICE simulations using TSMC 0.35 µm level-3 CMOS process parameters with ±1.65 V supply voltages verify their operation and compare with theoretical ones.en
dc.formattextcs
dc.format.extent555-558cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationProceedings of the 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS). 2017, p. 555-558.en
dc.identifier.doi10.1109/MWSCAS.2017.8052983cs
dc.identifier.isbn978-1-5090-6389-5cs
dc.identifier.other138292cs
dc.identifier.urihttp://hdl.handle.net/11012/70108
dc.language.isoencs
dc.publisherIEEEcs
dc.relation.ispartofProceedings of the 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS)cs
dc.relation.urihttp://ieeexplore.ieee.org/document/8052983/cs
dc.rights(C) IEEEcs
dc.rights.accessopenAccesscs
dc.subjectfractional-order circuiten
dc.subjectfractional-order oscillatoren
dc.subjectflipped voltage followeren
dc.subjectFVFen
dc.subjectoperational transconductance amplifieren
dc.subjectOTAen
dc.subjectvoltage bufferen
dc.subjectvoltage-modeen
dc.titleFractional-Order Oscillator Design Using Unity-Gain Voltage Buffers and OTAsen
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionacceptedVersionen
sync.item.dbidVAV-138292en
sync.item.dbtypeVAVen
sync.item.insts2020.03.31 09:57:04en
sync.item.modts2020.03.31 07:46:13en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav radioelektronikycs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. oddělení-TKO-SIXcs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. oddělení-REL-SIXcs
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