Integer-and Fractional-Order Integral and Derivative Two-Port Summations: Practical Design Considerations
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Date
2020-01-13
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Mark
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MDPI
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This paper targets on the design and analysis of specific types of transfer functions obtained by the summing operation of integer-order and fractional-order two-port responses. Various operations provided by fractional-order, two-terminal devices have been studied recently. However, this topic needs to be further studied, and the topologies need to be analyzed in order to extend the state of the art. The studied topology utilizes the passive solution of a constant-phase element (with order equal to 0.5) implemented by parallel resistor-capacitor circuit (RC) sections operating as a fractional-order two-port. The integer-order part is implemented by operational amplifier-based lossless integrators and differentiators in branches with electronically adjustable gain, useful for time constant tuning. Four possible cases of the fractional-order and integer-order two-port interconnections are analyzed analytically, by PSpice simulations and also experimentally in the frequency range between 10 Hz and 1 MHz. Standard discrete active components are used in this design for laboratory verification. Practical recommendations for construction and also particular solutions overcoming possible issues with instability and DC offsets are also given. Experimental and simulated results are in good agreement with theory.
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en