Extremely low-voltage low-power differential difference current conveyor using multiple-input bulk-driven technique
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In this paper, a new differential difference current conveyor (DDCC) with ultra-low voltage and low-power capability is presented. The DDCC is designed by using a non-tailed differential pair with multiple-input bulk-driven MOS transistor technique to obtain a rail-to-rail input common-mode swing and extremely low supply voltage. The MOS transistors biased in the sub-threshold region have been used to achieve extremely low power consumption. The performance of the proposed DDCC is evaluated by simulation results using SPICE program and MOS transistors parameters provided by a standard n-well 0.18 mu m CMOS process from TSMC. A rail-to-rail input common-mode range was shown and a high accuracy was expressed. The bandwidth was 2.2 kHz and the total harmonic distortion was 1% for an input signal with amplitude of 240 mV(p-p), obtained at supply voltage of 0.3 V and power dissipation of 28.6 nW. The proposed DDCC has been used to realize a sixth-order low-pass filter for application to electrocardiogram (ECG) applications. (C) 2020 Elsevier GmbH. All rights reserved.
KeywordsDifferential difference current conveyor, Subthreshold technique, Bulk-driven technique, Multiple-input bulk-driven technique, Low voltage and low power, High-order filter, Analog circuit
Document typePeer reviewed
Fulltext will be available on 11. 06. 2022
SourceAEU - International Journal of Electronics and Communications. 2020, vol. 123, issue 1, IF: 2.924, p. 1-11.
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