Hardware-Accelerated Cryptography For Software-Defined Networks
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2021
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Mark
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Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
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Abstract
This paper presents a Software-Defined Network (SDN) cryptographic solution targetedon high-speed smart Network Interface Cards (NICs) with an FPGA chip. This solution providesa fast alternative method to develop network-oriented data processing cryptography applications foran accelerator. A high-level programming language – Programming Protocol-independent PacketProcessor (P4) – is used to avoid a complex and time-consuming hardware development. The solutionconsists of two main parts: a library of mainly used cryptographic primitives written in VHSICHardware Description Language (VHDL) i.e. a symmetric cipher (AES-GCM-256), a hash function(SHA-3), a SHA-3-based Hash-based Message Authentication Code (HMAC), a digital signaturescheme (EdDSA) and a post-quantum digital signature scheme (Dilithium), and a compiler P4/VHDLwith the support for these cryptographic components as external objects of P416.
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Proceedings II of the 27st Conference STUDENT EEICT 2021: Selected Papers. s. 126-130. ISBN 978-80-214-5943-4
https://conf.feec.vutbr.cz/eeict/index/pages/view/ke_stazeni
https://conf.feec.vutbr.cz/eeict/index/pages/view/ke_stazeni
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Peer-reviewed
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en
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© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií