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Implementation of AES Algorithm on FPGA

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eeict2015-193-smekal.pdf (562.9Kb)
Date
2015
Author
Smékal, D.
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Abstract
This paper presents a VHDL (Very High Speed Integrated Circuit Hardware Description Language) implementation of 128-bit AES (Advanced Encryption Standard) on FPGA card (FieldProgrammable Gate Array) using Virtex-7 FPGA chip manufactured by Xilinx company. In this project our main concern is to implement all modules of this algorithm on hardware.
Keywords
Cryptography, FPGA, AES, VHDL
Persistent identifier
http://hdl.handle.net/11012/42973
Document type
Peer reviewed
Document version
Final PDF
Source
Proceedings of the 21st Conference STUDENT EEICT 2015. s. 193-195. ISBN 978-80-214-5148-3
http://www.feec.vutbr.cz/EEICT/
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  • Student EEICT 2015 [169]
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