Implementation of AES Algorithm on FPGA
Zusammenfassung
This paper presents a VHDL (Very High Speed Integrated Circuit Hardware Description Language) implementation of 128-bit AES (Advanced Encryption Standard) on FPGA card (FieldProgrammable Gate Array) using Virtex-7 FPGA chip manufactured by Xilinx company. In this project our main concern is to implement all modules of this algorithm on hardware.
Keywords
Cryptography, FPGA, AES, VHDLDocument type
Peer reviewedDocument version
Final PDFSource
Proceedings of the 21st Conference STUDENT EEICT 2015. s. 193-195. ISBN 978-80-214-5148-3http://www.feec.vutbr.cz/EEICT/
Collections
- Student EEICT 2015 [169]