Show simple item record

dc.contributor.authorSmékal, D.
dc.date.accessioned2015-08-25T08:42:56Z
dc.date.available2015-08-25T08:42:56Z
dc.date.issued2015cs
dc.identifier.citationProceedings of the 21st Conference STUDENT EEICT 2015. s. 193-195. ISBN 978-80-214-5148-3cs
dc.identifier.isbn978-80-214-5148-3
dc.identifier.urihttp://hdl.handle.net/11012/42973
dc.description.abstractThis paper presents a VHDL (Very High Speed Integrated Circuit Hardware Description Language) implementation of 128-bit AES (Advanced Encryption Standard) on FPGA card (FieldProgrammable Gate Array) using Virtex-7 FPGA chip manufactured by Xilinx company. In this project our main concern is to implement all modules of this algorithm on hardware.en
dc.formattextcs
dc.format.extent193-195cs
dc.format.mimetypeapplication/pdfen
dc.language.isocscs
dc.publisherVysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologiícs
dc.relation.ispartofProceedings of the 21st Conference STUDENT EEICT 2015en
dc.relation.urihttp://www.feec.vutbr.cz/EEICT/cs
dc.rights© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologiícs
dc.subjectCryptographyen
dc.subjectFPGAen
dc.subjectAESen
dc.subjectVHDLen
dc.titleImplementation of AES Algorithm on FPGAen
eprints.affiliatedInstitution.departmentFakulta elektrotechniky a komunikačních technologiícs
but.event.date23.04.2015cs
but.event.titleStudent EEICT 2015cs
dc.rights.accessopenAccessen
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen


Files in this item

Thumbnail

This item appears in the following Collection(s)

Show simple item record