Efficient Architecture and Implementation of Vector Median Filter in Co-Design Context
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Date
2007-09
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Mark
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Společnost pro radioelektronické inženýrství
Abstract
This work presents an efficient fast parallel architecture of the Vector Median Filter (VMF) using combined hardware/software (HW/SW) implementation. The hardware part of the system is implemented using VHDL language, whereas the software part is developed using C/C++ language. The software part of the embedded system uses the NIOS-II softcore processor and the operating system used is μClinux. The comparison between the software and HW/SW solutions shows that adding a hardware part in the design attempts to speed up the filtering process compared to the software solution. This efficient embedded system implementation can perform well in several image processing applications.
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Radioengineering. 2007, vol. 16, č. 3, s. 113-119. ISSN 1210-2512
http://www.radioeng.cz/fulltexts/2007/07_03_113_119.pdf
http://www.radioeng.cz/fulltexts/2007/07_03_113_119.pdf
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Peer-reviewed
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Published version
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en