QPSK Modulator with Continuous Phase and Fast Response Based on Phase-Locked Loop
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Among M-phase shift keying (M-PSK) schemes, quadrature phase-shift keying (QPSK) is used most often because of its efficient bandwidth consumption. However, in comparison with minimum-shift keying, which has continuous phase transitions, QPSK requires a higher bandwidth to transmit a signal. This article focuses on the phase transitions in QPSK signals, and a QPSK modulator based on a phase-locked loop (PLL) is proposed. The PLL circuit in the proposed system differs from that of conventional PLL circuits because a three-input XOR gate and a summing circuit are used. With these additional components, the proposed PLL provides a continuous phase change in the QPSK signal. Consequently, the required bandwidth for transmitting the QPSK signal when using the proposed circuit is less than that for a conventional QPSK signal with a discontinuous phase. The analytical results for the proposed system in the time domain agree well with the experimental and simulation results of the circuit. Both the theoretical and experimental results thus confirm that the proposed technique can be realized in real-world applications.
Document typePeer reviewed
Document versionFinal PDF
SourceRadioengineering. 2017 vol. 26, č. 2, s. 504-514. ISSN 1210-2512
- 2017/2