New Resistorless and Electronically Tunable Realization of Dual-Output VM All-Pass Filter Using VDIBA

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2013-01-07
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Mark
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Springer
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Abstract
In this paper, a new active element called voltage differencing inverting buffered amplifier (VDIBA) is presented. Using single VDIBA and a capacitor, a new resistorless voltage-mode (VM) first-order all-pass filter (APF) is proposed, which provides both inverting and non-inverting outputs at the same configuration simultaneously. The pole frequency of the filter can be electronically controlled by means of bias current of the internal transconductance. No component-matching conditions are required and it has low sensitivity. In addition, the parasitic and loading effects are also investigated. By connecting two newly introduced APFs in open loop a novel second-order APF is proposed. As another application, the proposed VM APF is connected in cascade to a lossy integrator in a closed loop to design a four-phase quadrature oscillator. The theoretical results are verified by SPICE simulations using TSMC 0.18 um level-7 CMOS process parameters with +-0.9 V supply voltages. Moreover, the behavior of the proposed VM APF was also experimentally measured using commercially available integrated circuit OPA860 by Texas Instruments.
In this paper, a new active element called voltage differencing inverting buffered amplifier (VDIBA) is presented. Using single VDIBA and a capacitor, a new resistorless voltage-mode (VM) first-order all-pass filter (APF) is proposed, which provides both inverting and non-inverting outputs at the same configuration simultaneously. The pole frequency of the filter can be electronically controlled by means of bias current of the internal transconductance. No component-matching conditions are required and it has low sensitivity. In addition, the parasitic and loading effects are also investigated. By connecting two newly introduced APFs in open loop a novel second-order APF is proposed. As another application, the proposed VM APF is connected in cascade to a lossy integrator in a closed loop to design a four-phase quadrature oscillator. The theoretical results are verified by SPICE simulations using TSMC 0.18 um level-7 CMOS process parameters with +-0.9 V supply voltages. Moreover, the behavior of the proposed VM APF was also experimentally measured using commercially available integrated circuit OPA860 by Texas Instruments.
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ANALOG INTEGRATED CIRCUITS AND SIGNAL PROCESSING. 2013, vol. 74, issue 1, p. 141-154.
https://link.springer.com/article/10.1007%2Fs10470-012-9936-2
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en
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