Fractional-Order Oscillator Design Using Unity-Gain Voltage Buffers and OTAs
Alternative metrics PlumXhttp://hdl.handle.net/11012/70108
MetadataShow full item record
In this study, a new voltage-mode fractional-order oscillator using two unity-gain voltage buffers, two operational transconductance amplifiers, one resistor, and two capacitors is presented. The design procedure of integer-order as well as fractional-order oscillator employing in total 20 MOS transistors is discussed. Effects of fractional-order capacitors on amplitude, phase, condition of oscillation, and frequency of oscillation are shown. Various case examples are given while SPICE simulations using TSMC 0.35 µm level-3 CMOS process parameters with ±1.65 V supply voltages verify their operation and compare with theoretical ones.
Document typePeer reviewed
SourceProceedings of the 2017 IEEE 60th International Midwest Symposium on Circuits and Systems (MWSCAS). 2017, p. 555-558.