Improvement of Bit Error Rate in Free Space Optical Link
Zusammenfassung
The article describes an inovative bit error rate reduction technique principle and its practical implementation. The design is implemented in an FPGA and can be combined with other more conventional BER reduction techniques. The presented approach benefits from properties of an optical channel which a general RF channel does not have.
Keywords
BER, FSO, FIFO, FPGA, Xilinx MIGDocument type
Peer reviewedDocument version
Final PDFSource
Proceedings of the 22nd Conference STUDENT EEICT 2016. s. 135-137. ISBN 978-80-214-5350-0http://www.feec.vutbr.cz/EEICT/
Collections
- Student EEICT 2016 [183]