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dc.contributor.authorSmékal, David
dc.contributor.authorBlažek, Petr
dc.date.accessioned2020-05-07T09:40:30Z
dc.date.available2020-05-07T09:40:30Z
dc.date.issued2017cs
dc.identifier.citationProceedings of the 23st Conference STUDENT EEICT 2017. s. 415-419. ISBN 978-80-214-5496-5cs
dc.identifier.isbn978-80-214-5496-5
dc.identifier.urihttp://hdl.handle.net/11012/187137
dc.description.abstractThis article discusses the use of entropy calculation on Field Programmable Gate Array (FPGA) for identifying anomalies in data communication. The article is focused on three type of entropy and described hardware-accelerated network card based on field programmable gate array, concretely NFB-40G2 card using the NetCOPE development platform and its properties.en
dc.formattextcs
dc.format.extent415-419cs
dc.format.mimetypeapplication/pdfen
dc.language.isoencs
dc.publisherVysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologiícs
dc.relation.ispartofProceedings of the 23st Conference STUDENT EEICT 2017en
dc.relation.urihttp://www.feec.vutbr.cz/EEICT/cs
dc.rights© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologiícs
dc.subjectAnomalyen
dc.subjectDDoSen
dc.subjectentropyen
dc.subjectFPGAen
dc.subjectnetwork attacken
dc.subjectRényien
dc.subjectShannonen
dc.subjectTsallisen
dc.titleHigh-Speed Anomaly Detection System Using Entropy Calculation On Fpgaen
eprints.affiliatedInstitution.departmentFakulta elektrotechniky a komunikačních technologiícs
but.event.date27.04.2017cs
but.event.titleStudent EEICT 2017cs
dc.rights.accessopenAccessen
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionPublishers's versionen


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