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dc.contributor.authorLanghammer, Lukášcs
dc.contributor.authorŠotner, Romancs
dc.contributor.authorDvořák, Jancs
dc.contributor.authorSládok, Ondřejcs
dc.contributor.authorJeřábek, Jancs
dc.contributor.authorBertsias, Panagiotiscs
dc.date.accessioned2021-03-08T15:54:39Z
dc.date.available2021-03-08T15:54:39Z
dc.date.issued2020-11-25cs
dc.identifier.citationProceedings of the 2020 IEEE International Conference on Electronics Circuits and Systems (ICECS). 2020, p. 1-4.en
dc.identifier.isbn978-1-7281-6044-3cs
dc.identifier.other165332cs
dc.identifier.urihttp://hdl.handle.net/11012/196447
dc.description.abstractThis contribution presents a design of a current–mode fractional–order electronically controllable integrator which can be used as a building block for a design of fractional–order (FO) circuits. The design is based on a 2nd–order Follow–the–Leader–Feedback topology which is suitably approximated to operate as an integrator of a fractional order. The topology is based on Operational Transconductance Amplifiers (OTAs), Adjustable Current Amplifiers (ACAs) and Current Follower (CF). The proposed structure offers the ability of the electronic control of its fractional order and also the electronic control of the frequency band. Simulations in Cadence IC6 (spectre) and more importantly experimental measurements were carried out to support the proposal. If wider bandwidth where the approximation is valid is required, a higher order structure must be used as also shown in this paper by utilization of a 4th–order FLF topology.en
dc.formattextcs
dc.format.extent1-4cs
dc.format.mimetypeapplication/pdfcs
dc.language.isoencs
dc.publisherIEEEcs
dc.relation.ispartofProceedings of the 2020 IEEE International Conference on Electronics Circuits and Systems (ICECS)cs
dc.relation.urihttps://ieeexplore.ieee.org/document/9294923cs
dc.rights(C) IEEEcs
dc.subjectcurrent modeen
dc.subjectelectronic controlen
dc.subjectfractional orderen
dc.subjectfractional–order emulatoren
dc.subjectintegratoren
dc.titleCurrent–Mode Fractional–Order Electronically Controllable Integrator Designen
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav radioelektronikycs
sync.item.dbidVAV-165332en
sync.item.dbtypeVAVen
sync.item.insts2021.03.08 16:54:39en
sync.item.modts2021.03.08 16:14:17en
dc.identifier.doi10.1109/ICECS49266.2020.9294923cs
dc.rights.accessopenAccesscs
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionacceptedVersionen


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