Browsing 2016/1 by Title
Now showing items 28-28 of 28
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A Verilog-A Based Fractional Frequency Synthesizer Model for Fast and Accurate Noise Assessment
(Společnost pro radioelektronické inženýrství, 2016-04)This paper presents a new strategy to simulate fractional frequency synthesizer behavioral models with better performance and reduced simulation time. The models are described in Verilog-A with accurate phase noise predictions ...