Ultra-Low Voltage Analog IC Design: Challenges, Methods and Examples
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The paper brings an overview of main challenges and design techniques effectively applicable for ultra-low voltage analog integrated circuits in nanoscale technologies. New design challenges linked with a low value of the supply voltage and the process fluctuation in nanotechnologies, such as device models, robustness to process variation, device mismatch and others are discussed firstly. Then, design techniques and approaches to analog integrated circuits towards (ultra) low-voltage systems and applications are described. Finally, examples of basic building blocks of ultra-low voltage analog ICs designed in standard CMOS technology using such design techniques are presented. Finally, the developed circuits are compared to the state-of-the-art solutions in terms of the main parameters and features.
KeywordsUltra-low supply voltage, analog design, integrated circuits, ultra-low voltage design techniques, bulk-driven
Document typePeer reviewed
Document versionFinal PDF
SourceRadioengineering. 2018 vol. 27, č. 1, s. 171-185. ISSN 1210-2512
- 2018/1