2016/2

Browse

Recent Submissions

Now showing 1 - 5 of 23
  • Thumbnail Image
    Item
    Reduction of EMC Emissions in Mixed Signal Integrated Circuits with Embedded LIN Driver
    (Společnost pro radioelektronické inženýrství, 2016-06) Hartl, Pavel; Kuban, Marian; Horsky, Pavel
    This paper describes several methods for reduction of electromagnetic emissions (EME) of mixed signal integrated circuits (IC). The focus is on the impact that a LIN bus communication block has on a complex IC which contains analog blocks, noisy digital block, micro-core (µC) and several types of memories. It is used in an automotive environment, where EMC emission reduction is one of the key success factors. Several proposed methods for EME reduction are described and implemented on three test chips. These methods include current consumption reduction, internal on-chip decoupling, ground separation and different linear voltage regulator topologies. Measurement results of several fabricated test chips are shown and discussed.
  • Thumbnail Image
    Item
    High-Precision CMOS Analog Computational Circuits Based on a New Linearly Tunable OTA
    (Společnost pro radioelektronické inženýrství, 2016-06) Saatlo, Ali Naderi
    Implementation of CMOS current-mode analog computational circuits are presented in this paper. A new Linearly Tunable OTA is employed in a modified structure as a basic building block for implementation of the circuits either linear or nonlinear functions. The proposed trans-conductance amplifier provides a constant Gm over a wide range of input voltage which allows the implementation of high precision computational circuits including square rooting, squaring, multiplication and division functions. Layout pattern of the proposed circuit confirms that the circuit can be implemented in 102μm*69μm active area. In order to verify the performance of the circuits, the post layout simulation results are presented through the use of HSPICE and Cadence with TSMC level 49 (BSIM3v3) parameters for 0.18 μm CMOS technology, where under supply voltage of 1.8 V, the maximum relative error of the circuits within 500 µA of input range is about 11 μA (2.2 % error) and the THD remains as low as 1.2 % for the worst case. Moreover, the power dissipation of the complete structure is found to be 0.66 mW.
  • Thumbnail Image
    Item
    Design of 12-phase, 2-stage Harmonic Rejection Mixer for TV Tuners
    (Společnost pro radioelektronické inženýrství, 2016-06) Lee, Dongju; Jeong, Hocheol; Lee, Minjae
    A two-stage 12-phase harmonic rejection mixer (HRM) for TV tuners is proposed in order to reject the local oscillator (LO) harmonics up to the ninth order. The proposed weighing scheme for 12-phase, 2-stage harmonic mixing can reduce the harmonic rejection (HR) sensitivity to the amplitude error caused by irrational numbers such as . To verify this HR, the 2-stage HR circuit is designed with baseband gm weighting in order to save power and improve the HR ratios without calibration. The proposed HRM achieves the third to ninth worst HR ratios, more than 55 dB, according to Monte Carlo simulations. It consumes 6.5 mA under a 2.5 V supply voltage.
  • Thumbnail Image
    Item
    Novel CMOS Bulk-driven Charge Pump for Ultra Low Input Voltage
    (Společnost pro radioelektronické inženýrství, 2016-06) Nagy, Gabriel; Arbet, Daniel; Stopjakova, Viera; Kovac, Martin
    In this paper, a novel bulk-driven cross-coupled charge pump designed in standard 90 nm CMOS technology is presented. The proposed charge pump is based on a dynamic threshold voltage inverter and is suitable for integrated ultra-low voltage converters. Due to a latchup risk, bulk-driven charge pumps can safely be used only in low-voltage applications. For the input voltage below 200 mV and output current of 1 uA, the proposed bulk-driven topology can achieve about 10 % higher efficiency than the conventional gate-driven cross-coupled charge pump. Therefore, it can be effectively used in DC-DC converters, which are the basic building blocks of on-chip energy harvesting systems with ultra-low supply voltage.
  • Thumbnail Image
    Item
    Analysis of Intermodulation Distortion in OFDM Based Transmitter Using EER Technique
    (Společnost pro radioelektronické inženýrství, 2016-06) Matejka, Stepan
    During the last two decades, new digital modulation systems have appeared in the audio broadcasting. Such broadcasting systems require new transmitters’ concepts to enable the transmission of digitally modulated signals. Moreover, the selected modulation schemes (e.g. orthogonal frequency division multiplexing) require a high linearity power stage, which typically exhibits low efficiency due to high peak-toaverage power ratio of the modulated signal. One of the promising transmitter concepts is the Kahn envelope elimination and restoration technique, where the original Cartesian in-phase and quadrature baseband signals are transformed to the envelope and phase signals. The main advantage of this technique is an ability to employ suitable types of highly efficient amplitude modulation transmitters for envelope amplification, while the phase modulated carrier is produced by an additional phase modulator. The substantial drawback of envelope elimination and restoration is nonideal recombination of linearly distorted amplitude signal and phase modulated carrier at the output power stage. The aim of this paper is twofold. Firstly, to analyze the effect of the envelope and phase signals bandwidth limitation on the modulated signal in-channel distortion and out-ofchannel emission. Secondly, to present the performance results as a reference for transmitter designers to properly set the envelope and phase paths to reach required in-channel signal quality and suppress out-of-channel products.