2007/3

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    Analysis of Analog Neural Network Model with CMOS Multipliers
    (Společnost pro radioelektronické inženýrství, 2007-09) Docheva, Liliana; Bekiarski, Alexander; Dochev, Ivo
    The analog neural networks have some very useful advantages in comparison with digital neural network, but recent implementation of discrete elements gives not the possibility for realizing completely these advantages. The reason of this is the great variations of discrete semiconductors characteristics. The VLSI implementation of neural network algorithm is a new direction of analog neural network developments and applications. Analog design can be very difficult because of need to compensate the variations in manufacturing, in temperature, etc. It is necessary to study the characteristics and effectiveness of this implementation. In this article the parameter variation influence over analog neural network behavior has been investigated.
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    A Robust Chaos-Based True Random Number Generator Embedded in Reconfigurable Switched-Capacitor Hardware
    (Společnost pro radioelektronické inženýrství, 2007-09) Drutarovsky, Milos; Galajda, Pavol
    This paper presents a new chaos-based True Random Number Generator (TRNG) with a decreased voltage supply sensitivity. Contrary to the traditionally used sources of randomness it uses a well-defined deterministic switched-capacitor circuit that exhibits chaos. The whole design is embedded into a commercially available mixed-signal Cypress PSoC reconfigurable device without any external components. The proposed design is optimized for a reduction of influence of the supply voltage to the quality of the generated random bit stream. The influence of circuit non-idealities is significantly reduced by the proposed XOR corrector and optimized circuit topology. The ultimate output bit rate of the proposed TRNG is 60 kbit/s and the quality of generated bit-streams is confirmed by passing standard FIPS and correlation statistical tests performed in the full range of PSoC device supply voltages.
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    Examination of Newton's Method Used for Indirect Frequency Offset Estimation
    (Společnost pro radioelektronické inženýrství, 2007-09) Dzubera, Jakub
    This paper deals with the topic of an indirect carrier frequency offset estimation and elimination. The main goal is to modify a conventional method as an attempt to develop a different approach and then to compare the performance of the modified method with the performance of the conventional one. The conventional approach is here represented by the gradient optimization method called the steepest descent. It is the base for the modification which utilizes Newton\'s method for the indirect carrier offset estimation. Both algorithms are implemented as phase-locked loops in a model of communication system. The simulation is processed in Matlab.
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    Efficient Architecture and Implementation of Vector Median Filter in Co-Design Context
    (Společnost pro radioelektronické inženýrství, 2007-09) Boudabous, Anis; Khriji, Lazhar; Ben Atitallah, A.; Kadionik, P.; Masmoudi, Nouri
    This work presents an efficient fast parallel architecture of the Vector Median Filter (VMF) using combined hardware/software (HW/SW) implementation. The hardware part of the system is implemented using VHDL language, whereas the software part is developed using C/C++ language. The software part of the embedded system uses the NIOS-II softcore processor and the operating system used is μClinux. The comparison between the software and HW/SW solutions shows that adding a hardware part in the design attempts to speed up the filtering process compared to the software solution. This efficient embedded system implementation can perform well in several image processing applications.
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    Biquads Based on Single Negative Impedance Converter Implemented by Classical Current Conveyor
    (Společnost pro radioelektronické inženýrství, 2007-09) Dostal, Tomas; Axman, Vladimir
    The paper deals with continuous-time ARC biquadratic (second-order) filters based on the single classical three-port current conveyors, so called second generation CC II. A unique application of the CC II is discussed, when the terminals Y and Z are connected together. Using this way a negative impedance converter is obtained as a suitable building block in synthesis of several biquads, including notch filters.