Integrated Temperature Sensor Bipolar Core

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Date
2018
ORCID
Advisor
Referee
Mark
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Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
Abstract
Analog front-end of a bipolar transistor based smart temperature sensor was designed in 110 nm CMOS processing technology TSMC 110 and verified using simulation taking PVT variation into account. The analog front-end of the sensor achieves 3s inaccuracy of +-3.5 °C untrimmed or +-0.7 °C after single point trim over the military temperature range (-55 °C to 125 °C), requiring supply voltage of 2.7-3.63 V, consuming as little as 1μW at 1 S/s and taking up less than 0:012mm2.
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Citation
Proceedings of the 24th Conference STUDENT EEICT 2018. s. 76-78. ISBN 978-80-214-5614-3
http://www.feec.vutbr.cz/EEICT/
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Peer-reviewed
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cz
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© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
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