Remote Memory Access Protocol Controller For Spacewire Network
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Date
2017
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Mark
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Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií
Abstract
This article describes design and implementation of Remote Memory Access Protocol controller, namely the initiator module specified in the ECSS-E-ST-50-52C standard. It provides general description of its architecture and describes some of its subcomponents. Finally, it summarizes resource utilization and maximum theoretical clock frequency for different configurations when synthesized for Spartan-3 FPGA chip.
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Proceedings of the 23st Conference STUDENT EEICT 2017. s. 251-253. ISBN 978-80-214-5496-5
http://www.feec.vutbr.cz/EEICT/
http://www.feec.vutbr.cz/EEICT/
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cs
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© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologií