Pronciple of the New AdjustedArchitecture of R-2R D/A Converter

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but.event.date28.04.2016cs
but.event.titleStudent EEICT 2016cs
dc.contributor.authorPolešáková, Zuzana
dc.date.accessioned2018-07-10T12:48:13Z
dc.date.available2018-07-10T12:48:13Z
dc.date.issued2016cs
dc.description.abstractOriginal R-2R D/A Converter architecture has a shortcoming – while resolution is bigger than 7 bits, switching of MSBs causes a significant non-linearity error, which may even cause DAC to be non-monotonous. A possible solution to this issue is shown in this paper: dividing MSBs into subbits of a lower weight. Analog circuitry and digital driving is published in this paper.en
dc.formattextcs
dc.format.extent144-146cs
dc.format.mimetypeapplication/pdfen
dc.identifier.citationProceedings of the 22nd Conference STUDENT EEICT 2016. s. 144-146. ISBN 978-80-214-5350-0cs
dc.identifier.isbn978-80-214-5350-0
dc.identifier.urihttp://hdl.handle.net/11012/83899
dc.language.isoencs
dc.publisherVysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologiícs
dc.relation.ispartofProceedings of the 22nd Conference STUDENT EEICT 2016en
dc.relation.urihttp://www.feec.vutbr.cz/EEICT/cs
dc.rights© Vysoké učení technické v Brně, Fakulta elektrotechniky a komunikačních technologiícs
dc.rights.accessopenAccessen
dc.subjectAnalog Integrated Circuitsen
dc.subjectD/A Conversionen
dc.subjectDNLen
dc.subjectINLen
dc.subjectR-2R DACen
dc.subjectSmall Chip Areaen
dc.titlePronciple of the New AdjustedArchitecture of R-2R D/A Converteren
dc.type.driverconferenceObjecten
dc.type.statusPeer-revieweden
dc.type.versionpublishedVersionen
eprints.affiliatedInstitution.departmentFakulta elektrotechniky a komunikačních technologiícs
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