MOS-Only Voltage-Mode All-Pass Filter Core Suitable for IC Design

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dc.contributor.authorMetin, Bilgincs
dc.contributor.authorHerencsár, Norbertcs
dc.contributor.authorKledrowetz, Vilémcs
dc.contributor.authorCicekoglu, Oguzhancs
dc.coverage.issueOctobercs
dc.coverage.volume110cs
dc.date.accessioned2020-11-10T16:22:55Z
dc.date.available2020-11-10T16:22:55Z
dc.date.issued2019-10-01cs
dc.description.abstractIn this paper, an area efficient CMOS first-order voltage-mode (VM) all-pass filter (APF) is proposed. The introduced resistorless MOS-only core circuit consists of three transistors only. For the design three transconductances and one gate-to-source capacitance of MOS transistors are sufficient instead of external passive resistors and capacitors, while the full implementation of the VM APF consists of 12 MOS transistors and one grounded capacitor only. Hence, the proposed circuit exhibits important features such as simplicity, permitting reduced chip area when integrated and wide operating frequency range compared to classical analog counterparts that require active elements employing large number of transistors. The theoretical results are in detail verified by numerous post-layout simulations using Cadence IC6 Spectre analog design environment. In the design, medium Vth transistors with 1.8 V supply voltage were used and modeled by the TSMC 180 nm CMOS process parameters available in EUROPRACTICE IC Service design kit. The post-layout simulated pole frequency of the VM APF is 4.825 MHz, the implemented layout including metal-insulator-metal on-chip capacitor occupies an area of 31.1 m x 39.5 m, while the total power consumption of the filter is found to be only 92.57 W.en
dc.description.embargo2021-07-20cs
dc.formattextcs
dc.format.extent1-7cs
dc.format.mimetypeapplication/pdfcs
dc.identifier.citationAEU - International Journal of Electronics and Communications. 2019, vol. 110, issue October, p. 1-7.en
dc.identifier.doi10.1016/j.aeue.2019.152834cs
dc.identifier.issn1434-8411cs
dc.identifier.other157769cs
dc.identifier.urihttp://hdl.handle.net/11012/195640
dc.language.isoencs
dc.relation.ispartofAEU - International Journal of Electronics and Communicationscs
dc.relation.urihttps://www.sciencedirect.com/science/article/abs/pii/S1434841119309847cs
dc.rightsCreative Commons Attribution-NonCommercial-NoDerivatives 4.0 Internationalcs
dc.rights.accessopenAccesscs
dc.rights.sherpahttp://www.sherpa.ac.uk/romeo/issn/1434-8411/cs
dc.rights.urihttp://creativecommons.org/licenses/by-nc-nd/4.0/cs
dc.subjectAll-pass filteren
dc.subjectanalog filteren
dc.subjectMOS-only filteren
dc.subjectpost-layout simulationsen
dc.subjectresistorless filteren
dc.subjectTSMC 180 nm CMOSen
dc.subjectvoltage-modeen
dc.titleMOS-Only Voltage-Mode All-Pass Filter Core Suitable for IC Designen
dc.type.driverarticleen
dc.type.statusPeer-revieweden
dc.type.versionacceptedVersionen
sync.item.dbidVAV-157769en
sync.item.dbtypeVAVen
sync.item.insts2021.07.20 00:54:36en
sync.item.modts2021.07.20 00:14:30en
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav telekomunikacícs
thesis.grantorVysoké učení technické v Brně. Fakulta elektrotechniky a komunikačních technologií. Ústav mikroelektronikycs
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